Engineering 980A/B
MASCE Design Project (Spring 2012)

General Information

Coordinator: Cheng Li, licheng@mun.ca, EN - 4012, 864- 8972
Office hour: Monday 14:00 - 16:30, or by individual appointment

Bulletin Board

[2012.4.16]: The list of projects and its description can be found below:

Category I: Wireless Communications and Networking

Project #1: Smart electricity meter reader (Supervisors: Dr. Cheng Li and Dr. Yuanzhu Chen)
The staff of electricity distributor can use an iOS device, e.g. iPad, as a terminal to read data from nearby meters. This is especially useful for the long winter in Newfoundland, where meters are often "estimated" in winter because the reading staff cannot get to the meter physically. This is alleviated by embedding a short-range radio in the meter and using a mobile terminal to read it from a distance or even from a moving vehicle. There are two tasks planned for this project: 1) iOS devices programming and development; 2) wireless networking using iOS devices for wireless sensor networks and smart grid applications.

Project #2: Infrastructureless social networking (Supervisors: Dr. Cheng Li and Dr. Yuanzhu Chen)
Mobile users find peers nearby using the short-range radios onboard of the iOS devices. These devices exchange messages when within range, both on behalf of themselves and other devices they have encountered previously. The social network thus formed is multi-hop and disruption tolerant inherently. The store-carry-forward paradigm of message transfer effectively extends the scope of the network operation without relying on any infrastructure. Apparently, broadcast (one-to-all) messages in this case is relatively straightforward for mobile devices to process, but unicast (one-to-one) messages are significantly more difficult to transfer without using a good deal of the network communication and storage space.

Project #3: Wireless sensor network based roadside collision detection system (Supervisor: Dr. Cheng Li)
This project will utilize the Texas Instrument (TI) platform based microcontroller (MSP430 and CC430) to establish a demonstration network for roadside moose-vehicle collision avoidance system using wireless sensor network technologies. Student will be required to conduct research on algorithms related to node discovery, routing, data aggregation, and multi-hop data relaying, as well as controller programming, sensor interfacing, system management and so on.

Project #4: Cooperative Relaying for Cognitive Radio Systems (Supervisors: Dr. Mohamed Ahmed and Dr. Octavia Dobre)
Cognitive radio is a new wireless communication paradigm where secondary users (SU) can use the allocated spectrum to primary users (PUs) without compromising the quality of service of PUs. In this project, the student will investigate the use of cooperative relaying to reduce the interference between secondary users and the primary users in cognitive radio wireless systems. The project will include theoretical work (design of algorithms) as well as experimental work (implementation and testing of the algorithms). The experimental work will use the equipment in the advances wireless communication research lab (including the vector signal generator, spectrum analyzer and wireless reconfigurable terminals).

Project #5: Cooperative Spectrum Sensing for Cognitive Radio Systems (Supervisors: Dr. Mohamed Ahmed and Dr. Octavia Dobre)
Cognitive radio is a new wireless communication paradigm where secondary users (SUs) can use the allocated spectrum to primary users (PUs) without compromising the quality of service of PUs. However, spectrum sensing is needed to detect the unutilized spectrum gaps. Errors in spectrum sensing can cause significant performance degradation to PUs. Hence, cooperative sensing (where multiple nodes are involved in sensing the spectrum utilization) is important to improve the spectrum sensing (by minimizing the spectrum sensing errors). In this project, the student will investigate the use of cooperative sensing in cognitive radio systems. The project will include theoretical work (design of algorithms) as well as experimental work (implementation and testing of the algorithms). The experimental work will use the equipment in the advances wireless communication research lab (including the vector signal generator, spectrum analyzer and wireless reconfigurable terminals).

Category II: Optical Fiber, Optical Communications, and Fiber Optic Sensors

Project #6: Design, fabrication, and characterization of novel fibre-optic sensors (supervisor: Dr. Qiying Chen)
Optical fibres are very important components in telecommunication and sensing industries. Fibre-optic sensors possess the advantages of immunity to electromagnetic interference, quasi-distributed measurement, which could be applied in harsh environments, such as ocean observation, oil and gas industries. This project will explore new fibre optic sensing techniques with topics include the understanding of fibre optics and some photonic devices, fabrication of microstructured optical fibre samples, characterization of optical and sensing properties of the fibres, analysis/simulation of light propagation and sensing mechanisms, and the development of new fibre-optic sensors.

Project #7: Photonic lightwave circuits for telecommunications (supervisor: Dr. Qiying Chen)
Photonic lightwave circuits are important devices for signal processing in fibre optic communications with merits of small footprint and high degree of integration. In this project, the performance and dynamic control of the performance of the photonic lightwave circuits will be studied, which includes topics such as the mechanisms of silica-based photonic lightwave circuits, operation of the integrated Mach-Zehnder interferometer, techniques to tune the performance of the photonic lightwave circuits, and methods to achieve multiplexed or demultiplexed signals or waveforms.

Project #8: Wireless communication for optical sensors (supervisors: Dr. Qiying Chen and Dr. Cheng Li)
Optical sensors, which utilize propagating light as an optic carrier to monitor environmental parameters, offer the advantages of high accuracy, fast response, and possible distributed measurement. To take advantages of the capabilities of the optical sensors, data collected by the optical sensors should be either immediately processed or stored, in which data transmittance to elsewhere through wireless communication is a preferred approach. In this project, several possible approaches to realize wireless communication of some optical sensors will be studied through modelling and analysis. The pros and cons of the optical wireless communication, for example, infrared technology in wireless applications, will be compared with other communication technologies, such as radio frequency and other industrial, and medical band technologies.

Project #9: Fibre-optic sensor network (supervisors: Dr. Qiying Chen and Dr. Cheng Li)
Fibre-optic sensors have been recognized as powerful sensors for monitoring different environmental parameters. In order to take full advantages of the merits of fibre-optic sensors and to achieve quasi-distributed sensing, it would be necessary to have multiple sensors to be networked with one single transceiver, in which a scheme to provide unambiguous sensor addressing (or multiplexing) and interrogation (or demodulation) must be identified. In this project, network topologies and multiplexing approaches, which are central to any fibre-optic sensor network, will be studied and the performance of different methods will be compared. Other aspects influencing the performance of the fibre-optic sensor network will also be investigated, which include communication protocols, energy harvesting, and optoelectronic device fabrication.

Project #10: OFDM implemented with fibre-optics approaches (supervisors: Dr. Qiying Chen and Dr. Cheng Li)
As a recognized method of encoding digital data on multiple carrier frequencies, orthogonal frequency-division multiplexing (OFDM) has become a leading physical layer interface in wireless communications. In this project, coherent optical orthogonal frequency-division multiplexing (CO-OFDM), which combines the advantages of coherent detection and OFDM modulation, possesses many advantages for future high-speed fibre transmission systems. The detailed topics in this project include theories of CO-OFDM, various design aspects in the fibre optic implementation of CO-OFDM, nonlinearity analysis, and approaches to reduce noise in digital signal processing.

Project #11: Organic solar cells (supervisor: Dr. Qiying Chen)
Plastic solar cell is a new type of photovoltaic device to convert solar energy into electricity. Intensive research has been conducted to develop low-cost photovoltaic technologies with salient merits of flexibility and high performance for solar cells utilizing organic materials. In this project, new polymer solar cells with improved performance will be investigated, which will include topics such as understanding of photovoltaic phenomenon and the associated devices, fabrication of thin films and devices, characterization of optical and electrical properties of polymer devices through data acquisition, and the development of new polymer solar cells with better efficiency.

Category III: Circuits, FPGA, VLSI and Design Automation

Project #12: Design and analysis of VLSI algorithms for electronic design automation software (Supervisor: Dr. Lihong Zhang)
Due to the rapid evolution of integrated circuit (IC) technology, the number of transistors on a single chip has grown from a few to over hundreds of million. The design and fabrication of Very-Large Scale Integration (VLSI) chips have developed beyond the capabilities of any number of humans without computer support. That is why Electronic Design Automation (EDA) tools are widely used in the modern VLSI design. This project is a software-oriented one, where students can choose one EDA topic (such as netlist sizing, partition, placement, routing, etc). The work includes a literature survey of available algorithms published recently, algorithm analysis/design, and software implementation in object-oriented languages. If time permits, some experiments will be conducted using certain benchmark circuits followed by comparison study.

Project #13: Extraction and study of modern MOSFET models (Supervisor: Dr. Lihong Zhang)
Conventionally a MOSFET is used as a three-terminal (i.e., gate, source and drain) device called a gate-driven MOSFET, where a signal is input from the gate terminal and the bulk terminal is simply connected to power or ground. As a promising technique, a MOSFET can be used as a four-terminal device (i.e., bulk additionally) and the signal can be input from the bulk terminal. As most of the modern MOSFET models used in the commercial simulators of the advanced submicron and nano technology are adapted for gate-driven MOSFETs, we want to study their performance in the bulk-driven applications. In this project, you will use some state-of-the-art commercial tools to extract MOSFET models. You can learn how to run VLSI transistor-level simulation. The target technology is CMOS 90nm or 65nm. Based on the extracted models, gate-driven and bulk-driven simulations can be run to compare the performance of multiple models.

Project #14: Design and optimization of low-power low-voltage mixed-signal integrated circuits (Supervisor: Dr. Lihong Zhang)
It is predicted that over 80 percent of all integrated circuits (ICs) would include mixed signals, compared to about 25 percent five years ago. This project is to investigate strategies that can be used to design and optimize low-power low-voltage mixed-signal ICs. Students will learn how to run transistor-level simulation and basic design techniques. The major work will include literature survey, background buildup, circuit design, and simulation verification. Some candidate topics may be ultra low-power digital logic, picoammeter circuits, ADC, or MEMS applications.

Project #15: FPGA implementation of digital systems (Supervisor: Dr. Lihong Zhang)
This project is to design and implement a digital system, such as a decoder or operator, using our existing FPGA development environment. This will contain the full design flow of the SoC design process, including RTL design, logic synthesis, and physical synthesis. The chosen digital system is not necessarily complex. The key points of this project are: 1) getting the entire flow work correctly; 2) choosing and correctly configuring the FPGA placement and routing tools; 3) investigating the utilization problem of the chosen FPGA placement tool.

Project #16: ASIC design and implementation of digital systems (Supervisor: Dr. Lihong Zhang)
This project is to design and implement a digital system using the recommended ASIC design flow and methodology supported by Canadian Microelectronics Corporation (CMC). The complete flow will include architecture design, RTL design, logic synthesis, and physical synthesis (i.e., placement and routing). The chosen digital system is not necessarily complex. The target technology may be CMOS 65nm, 90nm, 0.13 um, or 0.18 um. It is possible for a successful design/implementation to be ready for fabrication after the project is done.

Project #17: Microcontroller-based system for control or communication applications (Supervisor: Dr. Lihong Zhang)
This project is to design and implement a real-time system based on microcontroller (such as AVR, 8051, or PIC) for control or communication applications. A survey on the target subject will be conducted and a practical prototype is expected to function in the end.

Project #18: FPGA Implementation of FFT and IFFT for Communications networks (Supervisor: Dr. Cheng Li)
Fast Fourier Transform (FFT) and Inversed FFT are widely used in the communication networks for signal processing. In this project, the student will be asked to implement the FFT and IFFT operations on the Altera FPGA platform (DE-II or DE-IV) for efficiency. The work will start with floating point number arithmetic and will be extended to explore the capacity and speed of the available Altera FPGA devices.

Category IV: Network Security and its Implementation

Project #19: FPGA Implementation of PSCFB Mode for the Trivium Stream Cipher (Supervisor: Dr. Howard Heys)
Pipelined Statistical Cipher Feedback (PSCFB) mode of operation has been proposed for high speed synchronous communication at the physical layer using AES [1]. Although the scheme is proposed for block ciphers, it can be adapted to stream ciphers such as Trivium [2] to operate the stream cipher so that it is robust to bit slips and therefore suitable for physical layer communication. In this project, the student will realize the digital hardware design and implementation of the Trivium stream cipher configured for PSCFB mode. The system will be targeted to an Altera Cyclone IV EP4CE115 FPGA using the DE2-115 development board [3]. The outcomes of the project should include (1) a functionally-tested HDL description of the system, (2) the synthesis of the design including an analysis of the resulting resource and timing requirements, and (3) the tested realization of the design on the Altera board.

Project #20: Joint Implementation of AES and GrøTargeted to FPGA (Supervisor: Dr. Howard Heys)
The Grøhash algorithm [1] is a candidate for the SHA-3 algorithm currently under consideration by NIST [2]. Grøis based on the operations of AES and can be structured to reuse AES components in a digital hardware implementation [3]. In this project, the student will realize the digital hardware design and implementation of a joint implementation of AES and Grø which will make use of pipelining methods to efficient implement the encryption/hashing functionality. The system will be targeted to an Altera Cyclone IV EP4CE115 FPGA using the DE2-115 development board [4]. The outcomes of the project should include (1) a functionally tested HDL description of the cipher, (2) the synthesis of the design including an analysis of the resulting resource and timing requirements, and (3) the tested realization of the design on the Altera board.

Project #21: A High Speed Implementation of AES in FPGA(Supervisor: Dr. Howard Heys)
It is well known that high speed implementations of AES are possible through the use of pipelining [1]. In this project, the student will realize the digital hardware design and implementation of a pipelined AES structure targeted to an Altera Cyclone IV EP4CE115 FPGA using the DE2-115 development board [2]. The outcomes of the project should include (1) a functionally tested HDL description of the cipher, (2) the synthesis of the design including an analysis of the resulting resource and timing requirements, and (3) the tested realization of the design on the Altera board.

Project #22: A Compact Implementation of AES in FPGA (Supervisor: Dr. Howard Heys)
It is well known that compact AES implementations make use of S-boxes based on composite field arithmetic [1]. As well, it has been shown that efficient structuring of a pipelined AES S-box can be done to achieve a compact realization of the overall AES cipher [2]. This project will involve the design of the digital hardware realization of a compact AES implementation targeted to an Altera Cyclone IV EP4CE115 FPGA using the DE2-115 development board [3]. The outcomes of the project should include (1) a functionally tested HDL description of the cipher, (2) the synthesis of the design including an analysis of the resulting resource and timing requirements, and (3) the tested realization of the design on the Altera board.

Project #23: Application of Multiset Cryptanalysis to the BSPN Cipher (Supervisor: Dr. Howard Heys)
The Byte-oriented Substitution Permutation Network (BSPN) cipher is a symmetric key block cipher targeted to efficient implementation on an 8-bit microcontroller for resource-constrained applications such as wireless sensor networks [1]. BSPN has been analyzed in the context of linear and differential cryptanalysis, but has not been studied for its resistance related to multiset attacks (also known as the SQUARE attack, saturation attack, or integral attack) [2]. This project will be heavily research focused. The student will initially need to review literature related to the applicability of the attack, in particular, its application to AES. Subsequently, the attack will be applied to BSPN, through careful analysis and simulations programmed in C++ or Java. The outcomes of the project should include (1) demonstration of a thorough understanding of the method of multiset attacks and their applicability to block ciphers, (2) an analysis of the attacks applied to BSPN, and (3) simulation results of attack applied to BSPN.

Project #24: Improved Security Using Keystroke Dynamics (Supervisor: Dr. Howard Heys)
Computer system users are notorious for using poor passwords and thereby compromising the security of access to their system. One way to strength the use of passwords is to incorporate biometric data into the login process. One such method is making use of a user's keystroke dynamics (such as time between key presses, duration of key press, etc.) to analyze the source of a password as either the proper user or not [1]. This project was initiated by a previous MASCE student. The idea of the project will be to develop a system based on keystroke dynamics which is capable of either (1) strengthening the use of system passwords or (2) allowing continuous verification while a user is logged into a system. The outcomes of the project should include (1) demonstration of a thorough understanding of the methods associated with the characterization of users based on keystroke dynamics, (2) an implementation using C++ or Java of a system that incorporates keystroke dynamics into the login process or verification process, and (3) an analysis through experimentation of the success of the approach.

Category V: Software Engineering and Software Design`

Project #25:HARPO compiler, front-end (Supervisor: Dr. Theodore Norvell)
The front-end will parse programs in the HARPO language, check them for all any errors, and will translate them into object graph format.

Project #26:HARPO compiler, C back-end (Supervisor: Dr. Theodore Norvell)
The C back-end will translate programs from object graph format to parallel C code, written with pthreads.

Project #27:HARPO compiler, FPGA back-end (Supervisor: Dr. Theodore Norvell)
The FPGA back-end will translate programs from object graph format to VHDL or verilog for implementation on Altera and/or Xylinx FPGA hardware.

Project #28:Teaching Machine, United View (Supervisor: Dr. Theodore Norvell)
The united view will present the state of a computer using JHigraph. Each time the TM stops, the united view will rebuild a graph representation of the data and will re-lay out that graph.

Project #29:PrezZoom, model and graphics (Supervisor: Dr. Theodore Norvell)
PrezZoom is a new kind of presentation software that combines animation with zooming interfaces. The model and graphics part will mostly focus on building a model for presentations and displaying that model on an HTML5 Canvas.

Project #30:PrezZoom, user interface (Supervisor: Dr. Theodore Norvell)
The user interface allows the user to edit the model. The controls for the UI will be based on HTML form elements. UX design will be crucial to this project.

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