-- bg16x16_with_PAROut_receive_tb.vhd -- Testbench/testfixture used for IPC and switch fabric -- Cheng Li, Faculty of Engineering, Memorial University -- This VHDL model describes the behavior of a test fixture that -- is used to simulate the RTL model and the gate-level model -- of the circuit. library STD ; library IEEE ; library tpz973gtc; library vst_n18_sc_tsm_c4_typ; use STD.textio.all ; use IEEE.std_logic_1164.all ; use IEEE.std_logic_textio.all ; use WORK.all ; use tpz973gtc.components.all; use vst_n18_sc_tsm_c4_typ.components.all; entity TOP is end TOP; architecture TF1 of TOP is signal clk : std_logic:= '1'; signal reset : std_logic; signal Block_Info : std_logic_vector(15 downto 0); signal Out0, Out1, Out2, Out3 : std_logic_vector(15 downto 0); signal AckIn0, AckIn1, AckIn2, AckIn3 : std_logic_vector(15 downto 0); signal DataIn0, DataIn1, DataIn2, DataIn3 : std_logic_vector (383 downto 0); signal DataIn4, DataIn5, DataIn6, DataIn7 : std_logic_vector (383 downto 0); signal DataIn8, DataIn9, DataIn10, DataIn11 : std_logic_vector (383 downto 0); signal DataIn12, DataIn13, DataIn14, DataIn15 : std_logic_vector (383 downto 0); signal TagIn0, TagIn1, TagIn2, TagIn3 : std_logic_vector (18 downto 0); signal TagIn4, TagIn5, TagIn6, TagIn7 : std_logic_vector (18 downto 0); signal TagIn8, TagIn9, TagIn10, TagIn11 : std_logic_vector (18 downto 0); signal TagIn12, TagIn13, TagIn14, TagIn15 : std_logic_vector (18 downto 0); signal tag_active0, tag_active1 : std_logic_vector(15 downto 0); signal tag_active2, tag_active3 : std_logic_vector(15 downto 0); signal data_active0, data_active1 : std_logic_vector(15 downto 0); signal data_active2, data_active3 : std_logic_vector(15 downto 0); signal tagbuf_ParOut0, tagbuf_ParOut1 : std_logic_vector (18 downto 0); signal tagbuf_ParOut2, tagbuf_ParOut3 : std_logic_vector (18 downto 0); signal tagbuf_ParOut4, tagbuf_ParOut5 : std_logic_vector (18 downto 0); signal tagbuf_ParOut6, tagbuf_ParOut7 : std_logic_vector (18 downto 0); signal tagbuf_ParOut8, tagbuf_ParOut9 : std_logic_vector (18 downto 0); signal tagbuf_ParOut10, tagbuf_ParOut11 : std_logic_vector (18 downto 0); signal tagbuf_ParOut12, tagbuf_ParOut13 : std_logic_vector (18 downto 0); signal tagbuf_ParOut14, tagbuf_ParOut15 : std_logic_vector (18 downto 0); signal ackbuf_ParOut0, ackbuf_ParOut1 : std_logic_vector (15 downto 0); signal ackbuf_ParOut2, ackbuf_ParOut3 : std_logic_vector (15 downto 0); signal ackbuf_ParOut4, ackbuf_ParOut5 : std_logic_vector (15 downto 0); signal ackbuf_ParOut6, ackbuf_ParOut7 : std_logic_vector (15 downto 0); signal ackbuf_ParOut8, ackbuf_ParOut9 : std_logic_vector (15 downto 0); signal ackbuf_ParOut10, ackbuf_ParOut11 : std_logic_vector (15 downto 0); signal ackbuf_ParOut12, ackbuf_ParOut13 : std_logic_vector (15 downto 0); signal ackbuf_ParOut14, ackbuf_ParOut15 : std_logic_vector (15 downto 0); signal POut0_0, POut0_1, POut0_2, POut0_3 : std_logic_vector(383 downto 0); signal POut1_0, POut1_1, POut1_2, POut1_3 : std_logic_vector(383 downto 0); signal POut2_0, POut2_1, POut2_2, POut2_3 : std_logic_vector(383 downto 0); signal POut3_0, POut3_1, POut3_2, POut3_3 : std_logic_vector(383 downto 0); signal POut4_0, POut4_1, POut4_2, POut4_3 : std_logic_vector(383 downto 0); signal POut5_0, POut5_1, POut5_2, POut5_3 : std_logic_vector(383 downto 0); signal POut6_0, POut6_1, POut6_2, POut6_3 : std_logic_vector(383 downto 0); signal POut7_0, POut7_1, POut7_2, POut7_3 : std_logic_vector(383 downto 0); signal POut8_0, POut8_1, POut8_2, POut8_3 : std_logic_vector(383 downto 0); signal POut9_0, POut9_1, POut9_2, POut9_3 : std_logic_vector(383 downto 0); signal POut10_0,POut10_1,POut10_2,POut10_3 : std_logic_vector(383 downto 0); signal POut11_0,POut11_1,POut11_2,POut11_3 : std_logic_vector(383 downto 0); signal POut12_0,POut12_1,POut12_2,POut12_3 : std_logic_vector(383 downto 0); signal POut13_0,POut13_1,POut13_2,POut13_3 : std_logic_vector(383 downto 0); signal POut14_0,POut14_1,POut14_2,POut14_3 : std_logic_vector(383 downto 0); signal POut15_0,POut15_1,POut15_2,POut15_3 : std_logic_vector(383 downto 0); component new_bg16x16_with_PAROut_receive port ( clk, reset : in std_logic; Block_Info : out std_logic_vector(15 downto 0); Out0, Out1, Out2, Out3 : out std_logic_vector(15 downto 0); AckIn0, AckIn1, AckIn2, AckIn3 : in std_logic_vector(15 downto 0); DataIn0, DataIn1, DataIn2, DataIn3 : in std_logic_vector (383 downto 0); DataIn4, DataIn5, DataIn6, DataIn7 : in std_logic_vector (383 downto 0); DataIn8, DataIn9, DataIn10, DataIn11 : in std_logic_vector (383 downto 0); DataIn12, DataIn13, DataIn14, DataIn15 : in std_logic_vector (383 downto 0); TagIn0, TagIn1, TagIn2, TagIn3 : in std_logic_vector (18 downto 0); TagIn4, TagIn5, TagIn6, TagIn7 : in std_logic_vector (18 downto 0); TagIn8, TagIn9, TagIn10, TagIn11 : in std_logic_vector (18 downto 0); TagIn12, TagIn13, TagIn14, TagIn15 : in std_logic_vector (18 downto 0); tagbuf_ParOut0, tagbuf_ParOut1 : out std_logic_vector (18 downto 0); --new added 2002.2.24 tagbuf_ParOut2, tagbuf_ParOut3 : out std_logic_vector (18 downto 0); --new added 2002.2.24 tagbuf_ParOut4, tagbuf_ParOut5 : out std_logic_vector (18 downto 0); --new added 2002.2.24 tagbuf_ParOut6, tagbuf_ParOut7 : out std_logic_vector (18 downto 0); --new added 2002.2.24 tagbuf_ParOut8, tagbuf_ParOut9 : out std_logic_vector (18 downto 0); --new added 2002.2.24 tagbuf_ParOut10, tagbuf_ParOut11 : out std_logic_vector (18 downto 0); --new added 2002.2.24 tagbuf_ParOut12, tagbuf_ParOut13 : out std_logic_vector (18 downto 0); --new added 2002.2.24 tagbuf_ParOut14, tagbuf_ParOut15 : out std_logic_vector (18 downto 0); --new added 2002.2.24 ackbuf_ParOut0, ackbuf_ParOut1 : out std_logic_vector (15 downto 0); --new added 2002.2.24 ackbuf_ParOut2, ackbuf_ParOut3 : out std_logic_vector (15 downto 0); --new added 2002.2.24 ackbuf_ParOut4, ackbuf_ParOut5 : out std_logic_vector (15 downto 0); --new added 2002.2.24 ackbuf_ParOut6, ackbuf_ParOut7 : out std_logic_vector (15 downto 0); --new added 2002.2.24 ackbuf_ParOut8, ackbuf_ParOut9 : out std_logic_vector (15 downto 0); --new added 2002.2.24 ackbuf_ParOut10, ackbuf_ParOut11 : out std_logic_vector (15 downto 0); --new added 2002.2.24 ackbuf_ParOut12, ackbuf_ParOut13 : out std_logic_vector (15 downto 0); --new added 2002.2.24 ackbuf_ParOut14, ackbuf_ParOut15 : out std_logic_vector (15 downto 0); --new added 2002.2.24 tag_active0, tag_active1 : out std_logic_vector(15 downto 0); tag_active2, tag_active3 : out std_logic_vector(15 downto 0); data_active0, data_active1 : out std_logic_vector(15 downto 0); data_active2, data_active3 : out std_logic_vector(15 downto 0); POut0_0, POut0_1, POut0_2, POut0_3 : buffer std_logic_vector(383 downto 0); POut1_0, POut1_1, POut1_2, POut1_3 : buffer std_logic_vector(383 downto 0); POut2_0, POut2_1, POut2_2, POut2_3 : buffer std_logic_vector(383 downto 0); POut3_0, POut3_1, POut3_2, POut3_3 : buffer std_logic_vector(383 downto 0); POut4_0, POut4_1, POut4_2, POut4_3 : buffer std_logic_vector(383 downto 0); POut5_0, POut5_1, POut5_2, POut5_3 : buffer std_logic_vector(383 downto 0); POut6_0, POut6_1, POut6_2, POut6_3 : buffer std_logic_vector(383 downto 0); POut7_0, POut7_1, POut7_2, POut7_3 : buffer std_logic_vector(383 downto 0); POut8_0, POut8_1, POut8_2, POut8_3 : buffer std_logic_vector(383 downto 0); POut9_0, POut9_1, POut9_2, POut9_3 : buffer std_logic_vector(383 downto 0); POut10_0,POut10_1,POut10_2,POut10_3 : buffer std_logic_vector(383 downto 0); POut11_0,POut11_1,POut11_2,POut11_3 : buffer std_logic_vector(383 downto 0); POut12_0,POut12_1,POut12_2,POut12_3 : buffer std_logic_vector(383 downto 0); POut13_0,POut13_1,POut13_2,POut13_3 : buffer std_logic_vector(383 downto 0); POut14_0,POut14_1,POut14_2,POut14_3 : buffer std_logic_vector(383 downto 0); POut15_0,POut15_1,POut15_2,POut15_3 : buffer std_logic_vector(383 downto 0) ) ; end component; for all: new_bg16x16_with_PAROut_receive use entity WORK.new_bg16x16_with_PAROut_receive(structural); CONSTANT clkcycle: TIME := 10 NS; CONSTANT halfclock: TIME := clkcycle / 2; CONSTANT switchingcycle0: TIME := 482 * clkcycle - clkcycle / 4; --first cycle is 1 cycle less CONSTANT switchingcycle1: TIME := 483 * clkcycle - clkcycle / 4; CONSTANT remainingcycle: TIME := clkcycle / 4; CONSTANT totalcycle : integer := 200; begin s0: clk <= not clk after halfclock; s1: reset <= '1', '0' after 45 ns; s2: AckIn0 <= "0000000000000000"; --"1000100001110000", "0000000000000000" after 5000 ns; s3: AckIn1 <= "0000000000000000"; s4: AckIn2 <= "0000000000000000"; s5: AckIn3 <= "0000000000000000"; UUT : new_bg16x16_with_PAROut_receive Port Map ( clk=>clk, reset=>reset, Block_Info=>Block_Info, Out0=>Out0, Out1=>Out1, Out2=>Out2, Out3=>Out3, AckIn0=>AckIn0, AckIn1=>AckIn1, AckIn2=>AckIn2, AckIn3=>AckIn3, DataIn0=>DataIn0, DataIn1=>DataIn1, DataIn2=>DataIn2, DataIn3=>DataIn3, DataIn4=>DataIn4, DataIn5=>DataIn5, DataIn6=>DataIn6, DataIn7=>DataIn7, DataIn8=>DataIn8, DataIn9=>DataIn9, DataIn10=>DataIn10, DataIn11=>DataIn11, DataIn12=>DataIn12, DataIn13=>DataIn13, DataIn14=>DataIn14, DataIn15=>DataIn15, TagIn0=>TagIn0, TagIn1=>TagIn1, TagIn2=>TagIn2, TagIn3=>TagIn3, TagIn4=>TagIn4, TagIn5=>TagIn5, TagIn6=>TagIn6, TagIn7=>TagIn7, TagIn8=>TagIn8, TagIn9=>TagIn9, TagIn10=>TagIn10, TagIn11=>TagIn11, TagIn12=>TagIn12, TagIn13=>TagIn13, TagIn14=>TagIn14, TagIn15=>TagIn15, tagbuf_ParOut0=>tagbuf_ParOut0, tagbuf_ParOut1=>tagbuf_ParOut1, tagbuf_ParOut2=>tagbuf_ParOut2, tagbuf_ParOut3=>tagbuf_ParOut3, tagbuf_ParOut4=>tagbuf_ParOut4, tagbuf_ParOut5=>tagbuf_ParOut5, tagbuf_ParOut6=>tagbuf_ParOut6, tagbuf_ParOut7=>tagbuf_ParOut7, tagbuf_ParOut8=>tagbuf_ParOut8, tagbuf_ParOut9=>tagbuf_ParOut9, tagbuf_ParOut10=>tagbuf_ParOut10, tagbuf_ParOut11=>tagbuf_ParOut11, tagbuf_ParOut12=>tagbuf_ParOut12, tagbuf_ParOut13=>tagbuf_ParOut13, tagbuf_ParOut14=>tagbuf_ParOut14, tagbuf_ParOut15=>tagbuf_ParOut15, ackbuf_ParOut0=>ackbuf_ParOut0, ackbuf_ParOut1=>ackbuf_ParOut1, ackbuf_ParOut2=>ackbuf_ParOut2, ackbuf_ParOut3=>ackbuf_ParOut3, ackbuf_ParOut4=>ackbuf_ParOut4, ackbuf_ParOut5=>ackbuf_ParOut5, ackbuf_ParOut6=>ackbuf_ParOut6, ackbuf_ParOut7=>ackbuf_ParOut7, ackbuf_ParOut8=>ackbuf_ParOut8, ackbuf_ParOut9=>ackbuf_ParOut9, ackbuf_ParOut10=>ackbuf_ParOut10, ackbuf_ParOut11=>ackbuf_ParOut11, ackbuf_ParOut12=>ackbuf_ParOut12, ackbuf_ParOut13=>ackbuf_ParOut13, ackbuf_ParOut14=>ackbuf_ParOut14, ackbuf_ParOut15=>ackbuf_ParOut15, tag_active0=>tag_active0, tag_active1=>tag_active1, tag_active2=>tag_active2, tag_active3=>tag_active3, data_active0=>data_active0, data_active1=>data_active1, data_active2=>data_active2, data_active3=>data_active3, POut0_0=>POut0_0, POut0_1=>POut0_1, POut0_2=>POut0_2, POut0_3=>POut0_3, POut1_0=>POut1_0, POut1_1=>POut1_1, POut1_2=>POut1_2, POut1_3=>POut1_3, POut2_0=>POut2_0, POut2_1=>POut2_1, POut2_2=>POut2_2, POut2_3=>POut2_3, POut3_0=>POut3_0, POut3_1=>POut3_1, POut3_2=>POut3_2, POut3_3=>POut3_3, POut4_0=>POut4_0, POut4_1=>POut4_1, POut4_2=>POut4_2, POut4_3=>POut4_3, POut5_0=>POut5_0, POut5_1=>POut5_1, POut5_2=>POut5_2, POut5_3=>POut5_3, POut6_0=>POut6_0, POut6_1=>POut6_1, POut6_2=>POut6_2, POut6_3=>POut6_3, POut7_0=>POut7_0, POut7_1=>POut7_1, POut7_2=>POut7_2, POut7_3=>POut7_3, POut8_0=>POut8_0, POut8_1=>POut8_1, POut8_2=>POut8_2, POut8_3=>POut8_3, POut9_0=>POut9_0, POut9_1=>POut9_1, POut9_2=>POut9_2, POut9_3=>POut9_3, POut10_0=>POut10_0, POut10_1=>POut10_1, POut10_2=>POut10_2, POut10_3=>POut10_3, POut11_0=>POut11_0, POut11_1=>POut11_1, POut11_2=>POut11_2, POut11_3=>POut11_3, POut12_0=>POut12_0, POut12_1=>POut12_1, POut12_2=>POut12_2, POut12_3=>POut12_3, POut13_0=>POut13_0, POut13_1=>POut13_1, POut13_2=>POut13_2, POut13_3=>POut13_3, POut14_0=>POut14_0, POut14_1=>POut14_1, POut14_2=>POut14_2, POut14_3=>POut14_3, POut15_0=>POut15_0, POut15_1=>POut15_1, POut15_2=>POut15_2, POut15_3=>POut15_3 ); stimulus: PROCESS file TVin0 : TEXT is in "text_IPC0.txt" ; file TVin1 : TEXT is in "text_IPC1.txt" ; file TVin2 : TEXT is in "text_IPC2.txt" ; file TVin3 : TEXT is in "text_IPC3.txt" ; file TVin4 : TEXT is in "text_IPC4.txt" ; file TVin5 : TEXT is in "text_IPC5.txt" ; file TVin6 : TEXT is in "text_IPC6.txt" ; file TVin7 : TEXT is in "text_IPC7.txt" ; file TVin8 : TEXT is in "text_IPC8.txt" ; file TVin9 : TEXT is in "text_IPC9.txt" ; file TVin10: TEXT is in "text_IPC10.txt"; file TVin11: TEXT is in "text_IPC11.txt"; file TVin12: TEXT is in "text_IPC12.txt"; file TVin13: TEXT is in "text_IPC13.txt"; file TVin14: TEXT is in "text_IPC14.txt"; file TVin15: TEXT is in "text_IPC15.txt"; variable INline : LINE ; variable vData0, vData1, vData2, vData3, vData4, vData5 : std_logic_vector(383 downto 0); variable vData6, vData7, vData8, vData9, vData10, vData11 : std_logic_vector(383 downto 0); variable vData12, vData13, vData14, vData15 : std_logic_vector(383 downto 0); variable vTag0, vTag1, vTag2, vTag3, vTag4, vTag5, vTag6, vTag7 : std_logic_vector(18 downto 0); variable vTag8, vTag9, vTag10, vTag11, vTag12, vTag13, vTag14, vTag15 : std_logic_vector(18 downto 0); variable count : integer := 0; file TVout : TEXT is out "new_text_IPC16x16_out.txt" ; variable OUTline : LINE ; file TESTout0 : TEXT is out "new_text_hol_payload_16x16_bg.txt"; file TESTout1 : TEXT is out "new_text_receive_payload_16x16_bg.txt"; file TESTout2 : TEXT is out "new_text_tag_ack_info_16x16_bg.txt"; file TESTout3 : TEXT is out "new_text_delivered_tag_16x_16_bg.txt"; variable TESTline : LINE ; variable vtagdelivered : std_logic_vector(15 downto 0); constant msg0 : string := "Results after switching cycle "; constant msg1 : string := "Tag: "; constant msg2 : string := " ACK: "; constant msg3 : string := " Remaining TAG: "; constant msg4 : string := " Priority: "; constant msg5 : string := " --- Line "; constant space: string := " "; constant one_space : string := " "; variable vackbuf : std_logic_vector(15 downto 0); variable vtagbuf : std_logic_vector(15 downto 0); variable vresult : std_logic_vector(15 downto 0); variable vpriority : std_logic_vector(2 downto 0); variable cycles: integer := 1; variable linenum: integer := 0; begin wait on reset until reset = '0'; count := totalcycle; while (count > 0) loop -- *** start of signal assignment *** -- processing IPC line 0 if (Block_Info(0) = '0') then readline( TVin0 , INline ) ; read( INline , vData0 ) ; read( INline , vTag0); end if; DataIn0 <= vData0; TagIn0 <= vTag0; write (TESTline, vData0); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 1 if (Block_Info(1) = '0') then readline( TVin1 , INline ) ; read( INline , vData1 ) ; read( INline , vTag1); end if; DataIn1 <= vData1; TagIn1 <= vTag1; write (TESTline, vData1); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 2 if (Block_Info(2) = '0') then readline( TVin2 , INline ) ; read( INline , vData2 ) ; read( INline , vTag2); end if; DataIn2 <= vData2; TagIn2 <= vTag2; write (TESTline, vData2); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 3 if (Block_Info(3) = '0') then readline( TVin3 , INline ) ; read( INline , vData3 ) ; read( INline , vTag3); end if; DataIn3 <= vData3; TagIn3 <= vTag3; write (TESTline, vData3); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 4 if (Block_Info(4) = '0') then readline( TVin4 , INline ) ; read( INline , vData4 ) ; read( INline , vTag4); end if; DataIn4 <= vData4; TagIn4 <= vTag4; write (TESTline, vData4); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 5 if (Block_Info(5) = '0') then readline( TVin5 , INline ) ; read( INline , vData5 ) ; read( INline , vTag5); end if; DataIn5 <= vData5; TagIn5 <= vTag5; write (TESTline, vData5); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 6 if (Block_Info(6) = '0') then readline( TVin6 , INline ) ; read( INline , vData6 ) ; read( INline , vTag6); end if; DataIn6 <= vData6; TagIn6 <= vTag6; write (TESTline, vData6); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 7 if (Block_Info(7) = '0') then readline( TVin7 , INline ) ; read( INline , vData7 ) ; read( INline , vTag7); end if; DataIn7 <= vData7; TagIn7 <= vTag7; write (TESTline, vData7); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 8 if (Block_Info(8) = '0') then readline( TVin8 , INline ) ; read( INline , vData8 ) ; read( INline , vTag8); end if; DataIn8 <= vData8; TagIn8 <= vTag8; write (TESTline, vData8); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 9 if (Block_Info(9) = '0') then readline( TVin9 , INline ) ; read( INline , vData9 ) ; read( INline , vTag9); end if; DataIn9 <= vData9; TagIn9 <= vTag9; write (TESTline, vData9); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 10 if (Block_Info(10) = '0') then readline( TVin10 , INline ) ; read( INline , vData10 ) ; read( INline , vTag10); end if; DataIn10 <= vData10; TagIn10 <= vTag10; write (TESTline, vData10); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 11 if (Block_Info(11) = '0') then readline( TVin11 , INline ) ; read( INline , vData11 ) ; read( INline , vTag11); end if; DataIn11 <= vData11; TagIn11 <= vTag11; write (TESTline, vData11); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 12 if (Block_Info(12) = '0') then readline( TVin12 , INline ) ; read( INline , vData12 ) ; read( INline , vTag12); end if; DataIn12 <= vData12; TagIn12 <= vTag12; write (TESTline, vData12); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 13 if (Block_Info(13) = '0') then readline( TVin13 , INline ) ; read( INline , vData13 ) ; read( INline , vTag13); end if; DataIn13 <= vData13; TagIn13 <= vTag13; write (TESTline, vData13); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 14 if (Block_Info(14) = '0') then readline( TVin14 , INline ) ; read( INline , vData14 ) ; read( INline , vTag14); end if; DataIn14 <= vData14; TagIn14 <= vTag14; write (TESTline, vData14); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- processing IPC line 15 if (Block_Info(15) = '0') then readline( TVin15 , INline ) ; read( INline , vData15 ) ; read( INline , vTag15); end if; DataIn15 <= vData15; TagIn15 <= vTag15; write (TESTline, vData15); --add to verify data integrity write (TESTline, one_space); writeline (TESTout0, TESTline); -- *** end of one complete round (1/4 clock less) *** if (cycles = 1) then wait for switchingcycle0; else wait for switchingcycle1; end if; linenum := 0; -- processing IPC -- Line 0 write (OUTline, space); writeline (TVout, OUTline); write (OUTline, msg0); write (OUTline, cycles); writeline (TVout, OUTline); write (OUTline, msg1); write (OUTline, tagbuf_ParOut0); write (OUTline, msg2); write (OUTline, ackbuf_ParOut0); vtagbuf := tagbuf_ParOut0(18 downto 3); vackbuf := ackbuf_ParOut0; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut0(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut0_0); write (TESTline, one_space); write (TESTline, POut0_1); write (TESTline, one_space); write (TESTline, POut0_2); write (TESTline, one_space); write (TESTline, POut0_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut0); write (TESTline, one_space); write (TESTline, ackbuf_ParOut0); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 1 write (OUTline, msg1); write (OUTline, tagbuf_ParOut1); write (OUTline, msg2); write (OUTline, ackbuf_ParOut1); vtagbuf := tagbuf_ParOut1(18 downto 3); vackbuf := ackbuf_ParOut1; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut1(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut1_0); write (TESTline, one_space); write (TESTline, POut1_1); write (TESTline, one_space); write (TESTline, POut1_2); write (TESTline, one_space); write (TESTline, POut1_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut1); write (TESTline, one_space); write (TESTline, ackbuf_ParOut1); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 2 write (OUTline, msg1); write (OUTline, tagbuf_ParOut2); write (OUTline, msg2); write (OUTline, ackbuf_ParOut2); vtagbuf := tagbuf_ParOut2(18 downto 3); vackbuf := ackbuf_ParOut2; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut2(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut2_0); write (TESTline, one_space); write (TESTline, POut2_1); write (TESTline, one_space); write (TESTline, POut2_2); write (TESTline, one_space); write (TESTline, POut2_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut2); write (TESTline, one_space); write (TESTline, ackbuf_ParOut2); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 3 write (OUTline, msg1); write (OUTline, tagbuf_ParOut3); write (OUTline, msg2); write (OUTline, ackbuf_ParOut3); vtagbuf := tagbuf_ParOut3(18 downto 3); vackbuf := ackbuf_ParOut3; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut3(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut3_0); write (TESTline, one_space); write (TESTline, POut3_1); write (TESTline, one_space); write (TESTline, POut3_2); write (TESTline, one_space); write (TESTline, POut3_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut3); write (TESTline, one_space); write (TESTline, ackbuf_ParOut3); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 4 write (OUTline, msg1); write (OUTline, tagbuf_ParOut4); write (OUTline, msg2); write (OUTline, ackbuf_ParOut4); vtagbuf := tagbuf_ParOut4(18 downto 3); vackbuf := ackbuf_ParOut4; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut4(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut4_0); write (TESTline, one_space); write (TESTline, POut4_1); write (TESTline, one_space); write (TESTline, POut4_2); write (TESTline, one_space); write (TESTline, POut4_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut4); write (TESTline, one_space); write (TESTline, ackbuf_ParOut4); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 5 write (OUTline, msg1); write (OUTline, tagbuf_ParOut5); write (OUTline, msg2); write (OUTline, ackbuf_ParOut5); vtagbuf := tagbuf_ParOut5(18 downto 3); vackbuf := ackbuf_ParOut5; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut5(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut5_0); write (TESTline, one_space); write (TESTline, POut5_1); write (TESTline, one_space); write (TESTline, POut5_2); write (TESTline, one_space); write (TESTline, POut5_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut5); write (TESTline, one_space); write (TESTline, ackbuf_ParOut5); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 6 write (OUTline, msg1); write (OUTline, tagbuf_ParOut6); write (OUTline, msg2); write (OUTline, ackbuf_ParOut6); vtagbuf := tagbuf_ParOut6(18 downto 3); vackbuf := ackbuf_ParOut6; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut6(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut6_0); write (TESTline, one_space); write (TESTline, POut6_1); write (TESTline, one_space); write (TESTline, POut6_2); write (TESTline, one_space); write (TESTline, POut6_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut6); write (TESTline, one_space); write (TESTline, ackbuf_ParOut6); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 7 write (OUTline, msg1); write (OUTline, tagbuf_ParOut7); write (OUTline, msg2); write (OUTline, ackbuf_ParOut7); vtagbuf := tagbuf_ParOut7(18 downto 3); vackbuf := ackbuf_ParOut7; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut7(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut7_0); write (TESTline, one_space); write (TESTline, POut7_1); write (TESTline, one_space); write (TESTline, POut7_2); write (TESTline, one_space); write (TESTline, POut7_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut7); write (TESTline, one_space); write (TESTline, ackbuf_ParOut7); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 8 write (OUTline, msg1); write (OUTline, tagbuf_ParOut8); write (OUTline, msg2); write (OUTline, ackbuf_ParOut8); vtagbuf := tagbuf_ParOut8(18 downto 3); vackbuf := ackbuf_ParOut8; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut8(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut8_0); write (TESTline, one_space); write (TESTline, POut8_1); write (TESTline, one_space); write (TESTline, POut8_2); write (TESTline, one_space); write (TESTline, POut8_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut8); write (TESTline, one_space); write (TESTline, ackbuf_ParOut8); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 9 write (OUTline, msg1); write (OUTline, tagbuf_ParOut9); write (OUTline, msg2); write (OUTline, ackbuf_ParOut9); vtagbuf := tagbuf_ParOut9(18 downto 3); vackbuf := ackbuf_ParOut9; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut9(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut9_0); write (TESTline, one_space); write (TESTline, POut9_1); write (TESTline, one_space); write (TESTline, POut9_2); write (TESTline, one_space); write (TESTline, POut9_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut9); write (TESTline, one_space); write (TESTline, ackbuf_ParOut9); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 10 write (OUTline, msg1); write (OUTline, tagbuf_ParOut10); write (OUTline, msg2); write (OUTline, ackbuf_ParOut10); vtagbuf := tagbuf_ParOut10(18 downto 3); vackbuf := ackbuf_ParOut10; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut10(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut10_0); write (TESTline, one_space); write (TESTline, POut10_1); write (TESTline, one_space); write (TESTline, POut10_2); write (TESTline, one_space); write (TESTline, POut10_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut10); write (TESTline, one_space); write (TESTline, ackbuf_ParOut10); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 11 write (OUTline, msg1); write (OUTline, tagbuf_ParOut11); write (OUTline, msg2); write (OUTline, ackbuf_ParOut11); vtagbuf := tagbuf_ParOut11(18 downto 3); vackbuf := ackbuf_ParOut11; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut11(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut11_0); write (TESTline, one_space); write (TESTline, POut11_1); write (TESTline, one_space); write (TESTline, POut11_2); write (TESTline, one_space); write (TESTline, POut11_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut11); write (TESTline, one_space); write (TESTline, ackbuf_ParOut11); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 12 write (OUTline, msg1); write (OUTline, tagbuf_ParOut12); write (OUTline, msg2); write (OUTline, ackbuf_ParOut12); vtagbuf := tagbuf_ParOut12(18 downto 3); vackbuf := ackbuf_ParOut12; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut12(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut12_0); write (TESTline, one_space); write (TESTline, POut12_1); write (TESTline, one_space); write (TESTline, POut12_2); write (TESTline, one_space); write (TESTline, POut12_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut12); write (TESTline, one_space); write (TESTline, ackbuf_ParOut12); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 13 write (OUTline, msg1); write (OUTline, tagbuf_ParOut13); write (OUTline, msg2); write (OUTline, ackbuf_ParOut13); vtagbuf := tagbuf_ParOut13(18 downto 3); vackbuf := ackbuf_ParOut13; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut13(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut13_0); write (TESTline, one_space); write (TESTline, POut13_1); write (TESTline, one_space); write (TESTline, POut13_2); write (TESTline, one_space); write (TESTline, POut13_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut13); write (TESTline, one_space); write (TESTline, ackbuf_ParOut13); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 14 write (OUTline, msg1); write (OUTline, tagbuf_ParOut14); write (OUTline, msg2); write (OUTline, ackbuf_ParOut14); vtagbuf := tagbuf_ParOut14(18 downto 3); vackbuf := ackbuf_ParOut14; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut14(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut14_0); write (TESTline, one_space); write (TESTline, POut14_1); write (TESTline, one_space); write (TESTline, POut14_2); write (TESTline, one_space); write (TESTline, POut14_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut14); write (TESTline, one_space); write (TESTline, ackbuf_ParOut14); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- Line 15 write (OUTline, msg1); write (OUTline, tagbuf_ParOut15); write (OUTline, msg2); write (OUTline, ackbuf_ParOut15); vtagbuf := tagbuf_ParOut15(18 downto 3); vackbuf := ackbuf_ParOut15; vresult := vtagbuf and vackbuf; vpriority := tagbuf_ParOut15(2 downto 0); write (OUTline, msg3); write (OUTline, vresult); write (OUTline, msg4); write (OUTline, vpriority); write (OUTline, msg5); write (OUTline, linenum); writeline (TVout, OUTline); -- Added to verify the correct receipt of payload -------------------------- vtagdelivered := vtagbuf xor vresult; write (TESTline, vtagdelivered); write (TESTline, one_space); writeline (TESTout3, TESTline); write (TESTline, POut15_0); write (TESTline, one_space); write (TESTline, POut15_1); write (TESTline, one_space); write (TESTline, POut15_2); write (TESTline, one_space); write (TESTline, POut15_3); write (TESTline, one_space); writeline (TESTout1, TESTline); write (TESTline, tagbuf_ParOut15); write (TESTline, one_space); write (TESTline, ackbuf_ParOut15); write (TESTline, one_space); write (TESTline, vresult); write (TESTline, one_space); writeline (TESTout2, TESTline); linenum := linenum + 1; -- *** end of one complete round (after remaing 1/4 clock is completed) *** wait for remainingcycle; count := count - 1; cycles:= cycles + 1; end loop; wait; END PROCESS; end TF1 ; configuration testFixture1 of TOP is for TF1 end for ; end testFixture1 ;