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Instructor:
Cheng Li,
EN-4012, 864-8972,
licheng@mun.ca
Please note that the notes will be updated continuously. | 0. Mini-Project Lab Requirement |
pdf file |
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| 1. ModelSim Tutorial |
pdf file |
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| 2. Chapter 1: Introduction to Digital Logic and Digital System |
Notes in .pdf |
| | 3. Chapter 2: Basic Features of VHDL |
Notes in .pdf |
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| 4. Chapter 3: Digital System Design and Design Methodology and Minimization Techniques |
Notes in .pdf |
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| 5. Chapter 4: Programmable Logic Devices |
Notes in .pdf |
| | 8. Chapter 7(I): Deal With Asynchronous Boundaries |
Notes in .pdf |
| | 9. Chapter 8(II): Deal With Asynchronous Boundaries (Specifications) |
Notes in .pdf |
| | 6. Chapter 5: Digital System Testing |
Notes in .pdf |
| | 7. Chapter 6: Reliability, Transmission Line Effects, Noise in Digital Systems |
Notes in .pdf |
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| 9. Chapter 10: Desgin Example: MIPS R2000 Processor |
Notes in .pdf |
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Last updated on Jan 6, 2016.
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